CMOS versus CCD – what if you don’t have to choose?

The latest requirements for 3D metrology and inspection in the semiconductor industry require high resolution and fast frame rate cameras.  For these applications, CMOS-based cameras are required, with the trade-off of lower dynamic range and less sensitivity compared to CCD-based cameras. CMOS image sensors continue to get dramatically better fueled by the extensive resources and R&D in the consumer market, but what if it was possible to have no trade-offs?

With the continuous drive to smaller technology nodes (and subsequent structures) in the semiconductor and electronics industry, there is a resulting pressure on the inspection and metrology equipment manufactures to keep up.  One of the big challenges in the semiconductor industry is how to handle process control with shrinking details and new materials.   As stated in a recent article http://semiengineering.com/challenges-mount-inspectionmetrology/:

“All told, chipmakers face a dizzying array of challenges in process control, but two problems stand out in the crowd—defect inspection and 3D metrology. For example, the ability to detect sub-30nm defects is challenging with today’s inspection tools. And on another front, finFETs require 3D metrology to measure the structures, but the production tools generally don’t exist today. So, chipmakers must use the current methods, which can be a cumbersome and expensive process.”

Of course the leading inspection and metrology equipment manufacturers are hard at work to deliver what their customers need.  This demand filters down to the machine vision camera market, which got us thinking of where we see the technology going. Here are a few of our thoughts…

Continued improvements in CMOS image sensor technology

With huge investments in CMOS image sensor technology driven by those required for cell phones and other consumer cameras, the developments have been dramatic with the image quality approaching that of CCD.  As more transistors can be added, there is more correlated double sampling and lower noise in pixel designs.  The space required for the logic in the pixel is reduced thus increasing the sensitivity, increasing the performance at low light levels.  In the future, the read noise will get down to a few electrons.  There will be continuous work towards a true global shutter with no artifacts (PLS < 1/100000) and provide a wider dynamic range (adding at least 10dB vs todays common performance).

As a result of the ability to shrink the details of the pixel, there are constant innovations with smaller pixels.  This is again driven by the consumer market and is not necessarily the best for the machine vision industry.

Continued increase of CMOS-based cameras over CCD

Because of the image quality improvements in CMOS image sensors often combined with lower costs, CMOS-based cameras have taken over for CCD cameras in many machine vision applications.  Because of the limitations in frame rate at high resolutions with CCD image sensors, there will be a continued increase of CMOS cameras even in the high performance instruments like those required in semiconductor manufacturing. 

While very small pixels are not always an advantage, one of the major benefits of smaller pixels is to have increased resolution with the same optical format at high framerates. Higher resolution with inspection and metrology systems increases the field of view (FOV), which provides additional details or reduces the number of inspection sites and thus reduces the total scan time of the device under test.  Both of which increase the performance of the system either by increased accuracy or throughput or both.  Higher frame rates are necessary to maintain throughput with 3D Metrology, as often multiple images are required per measurement.

With continued improvements, CCD image sensors may maintain an edge on dynamic range and uniformity, but CCD-based cameras will continue to become more niche.

What if you could have the advantages of both CCD and CMOS?

A 3D IC (three dimensional integrated circuit) is a chip with two or more layers of active electronic components integrated vertically and horizontally into one circuit.  Some manufacturers are looking into using this for image sensors with 1 CCD layer and 1 CMOS layer.  This would give the best of both worlds with the sensing part of CCD and the readout part of CMOS.  These are currently not available, but may address measurement challenges in the near future.

Backside Illumination

Another advance with CMOS technology is backside illumination (BSI), which greatly reduces noise and improves low light performance.  Sony has developed this further with stacked CMOS.  These again have been developed from demand in mobile devices such as smart phones and tablets.  Industrial cameras using this technology may be a ways out but might be helpful in semiconductor manufacturing for a little while.  As stated in the Semi Engineering article above: 

“Inspection pixel size is 50nm to 100nm, yet customers are looking at defects in the 14nm range. Algorithms and sensors can help extend optical inspection, but it is becoming very challenging. Expect extensions to work for a few more nodes, but then expect a gradual shift of some steps to e-beam inspection.”

Optical-based camera measurements will continue to satisfy the needs of the semiconductor market for at least the next 5 years, especially with the advances in CMOS images sensors and subsequent cameras.  For adequate characterization and process control in the future, different tools such as deep UV cameras and new X-ray based techniques will be required.  These are still too costly, complex and slow to be used in-line so much progress must be made for acceptance outside of R&D.